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| MCP2120 Infrared Encoder/Decoder Features * Supports with IrDA Physical Layer Specification (version 1.3) * UART to IR Encoder/Decoder - Interfaces with IrDA Compliant Transceivers - Used with any UART, including standard 16550 UART and microcontroller UART * Transmit/Receive formats supported: - 1.63 s * Hardware or Software Baud rate selection - Up to IrDA standard 115.2 kbaud operation - Up to 312.5 kbaud operation (at 20 MHz) - Low power mode * Pb-free packaging (R) Pin Diagrams PDIP, SOIC VDD OSC1/CLKIN OSC2 RESET RXIR TXIR MODE 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VSS EN TX RX BAUD0 BAUD1 BAUD2 MCP2120 Block Diagram MCP2120 TX Encode TXIR CMOS Technology * * * * * Low-power, high-speed CMOS technology Fully static design Low voltage operation Commercial and Industrial temperature ranges Low power consumption - < 1 mA @ 3.3V, 8 MHz (typical) - 3 mA typical @ 5.0V when disabled EN BAUD2 BAUD1 BAUD0 MODE Logic Baud Rate Generator RX Decode RXIR (c) 2007 Microchip Technology Inc. DS21618B-page 1 MCP2120 NOTES: DS21618B-page 2 (c) 2007 Microchip Technology Inc. MCP2120 1.0 DEVICE OVERVIEW 1.1 Applications This document contains device specific information for the following device: * MCP2120 This device is a low-cost, high-performance, fully-static infrared encoder/decoder. This device sits between a UART and an infrared (IR) optical transceiver. The data received from a standard UART is encoded (modulated), and output as electrical pulses to the IR Transceiver. The IR Transceiver also receives data which it outputs as electrical pulses. The MCP2120 decodes (demodulates) these electrical pulses and then the data is transmitted by the MCP2120 UART. This modulation and demodulation method is performed in accordance with the IrDA standard. Typically a microcontroller interfaces to the IR encoder/ decoder. Infrared communication is a wireless two-way data connection using infrared light generated by low-cost transceiver signaling technology. This provides reliable communication between two devices. Infrared technology offers: * Universal standard for connecting portable computing devices * Easy, effortless implementation * Economical alternative to other connectivity solutions * Reliable, high speed connection * Safe to use in any environment; can even be used during air travel * Eliminates the hassle of cables * Allows PC's and non-PC's to communicate to each other * Enhances mobility by allowing users to easily connect The MCP2120 is a stand-alone IrDA Encoder/Decoder product. Figure 1-1 shows a typical application block diagram. Table 1-2 shows the pin definitions in the user (normal) mode of operation. TABLE 1-1: MCP2120 FEATURES OVERVIEW MCP2120 UART, IR Hardware/Software Yes Wake-up (DRT) 14-pin DIP 14-pin SOIC Features Serial Communications: Baud Rate Selection: Low Power Mode: Resets: (and Delays) Packages: FIGURE 1-1: System Block Diagram Micro- Controller TX UART EN RX TX MCP2120 Encode Power Down Logic Decode RXIR RXD TXIR Optical Transceiver TXD RX BAUD2 BAUD1 BAUD0 I/O MODE (S/W Mode) Baud Rate Generator (c) 2007 Microchip Technology Inc. DS21618B-page 3 MCP2120 TABLE 1-2: Pin Name VDD OSC1/CLKIN OSC2 RESET RXIR TXIR MODE PIN DESCRIPTION USER MODE Pin Number PDIP 1 2 3 4 5 6 7 SOIC 1 2 3 4 5 6 7 Pin Type -- I O I I O I Buffer Type P -- ST ST -- TTL Description Positive supply for logic and I/O pins Oscillator crystal Output Resets the Device Asynchronous receive from infrared transceiver Asynchronous transmit to infrared transceiver Selects the device mode (Data/Command) for Software Baud Rate operation. For more information see Section 2.4.1.2 "Software Selection". BAUD2:BAUD0 specify the Baud rate of the device, or if the device operates in Software Baud Rate mode. For more information see Section 2.4.1 "Baud Rate". Asynchronous transmit to controller UART Asynchronous receive from controller UART Device Enable. Ground reference for logic and I/O pins CMOS Oscillator crystal input/external clock source input BAUD2 BAUD1 BAUD0 RX TX EN VSS Legend: 8 9 10 11 12 13 14 8 9 10 11 12 13 14 I I I O I I -- TTL TTL TTL -- TTL -- P TTL = TTL compatible input I = Input P = Power ST = Schmitt Trigger input with CMOS levels O = Output CMOS = CMOS compatible input DS21618B-page 4 (c) 2007 Microchip Technology Inc. MCP2120 2.0 DEVICE OPERATION 2.4 UART Interface The MCP2120 is a low cost infrared Encoder/Decoder. The baud rate is user selectable to standard IrDA baud rates between 9600 baud to 115.2 kbaud. The maximum baud rate is 312.5 kbaud. The UART interface communicates with the "controller". This interface is a Half duplex interface, meaning that the system is either transmitting or receiving, but not both at the same time. 2.1 Power-up 2.4.1 BAUD RATE Any time that the device is powered up, the Device Reset Timer delay (parameter 32) must occur before any communication with the device is initiated. This is from both the infrared transceiver side as well as the controller UART interface. The baud rate for the MCP2120 can be configured either by the state of three hardware pins (BAUD2, BAUD1, and BAUD0) or through software selection. 2.4.1.1 Hardware Selection 2.2 Device Reset The MCP2120 is forced into the reset state when the RESET pin is in the low state. After the RESET pin is brought to a high state, the Device Reset Timer occurs. Once the DRT times out, normal operation occurs. Three device pins are used to select the baud rate that the MCP2120 will transmit and receive data. These pins are called BAUD2, BAUD1, and BAUD0. There is one pin state (device mode) where the application software can specify the baud rate. Table 2-1 shows the baud rate configurations. 2.3 Bit Clock The device crystal is used to derive the communication bit clock (BITCLK). There are 16 BITCLKs for each bit time. The BITCLKs are used for the generation of the Start bit and the eight data bits. The Stop bit uses the BITCLK when the data is transmitted (not for reception). This clock is a fixed frequency, and has minimal variation in frequency (specified by crystal manufacturer). TABLE 2-1: HARDWARE BAUD RATE SELECTION VS. FREQUENCY Frequency (MHz) BAUD2:BAUD0 0.6144 (1) 2.000 3.6864 4.9152 7.3728 14.7456(2) 20.000(2) Bit Rate 000 800 2604 4800 6400 9600 19200 26042 FOSC / 768 1600 5208 9600 12800 19200 38400 52083 FOSC / 384 001 010 3200 10417 19200 25600 38400 78600 104167 FOSC / 192 4800 15625 28800 38400 57600 115200 156250 FOSC / 128 011 9600 31250 57600 78600 115200 230400 312500 FOSC / 64 100 Note 1: An external clock is recommended for frequencies below 2 MHz. 2: For frequencies above 7.5 MHz, the TXIR pulse width (parameter IR121) will be shorter than the minimum pulse width of 1.6 s in the IrDA standard specification. (c) 2007 Microchip Technology Inc. DS21618B-page 5 MCP2120 2.4.1.2 Software Selection 2.4.3 RECEIVING When the BAUD2:BAUD0 pins are configured as '111' the MCP2120 defaults to a baud rate of FOSC / 768. To place the MCP2120 into Command Mode, the MODE pin must be at a low level. When in this mode, any data that is received by the MCP2120's UART is "echoed" back to the controller and no encoding/ decoding occurs. The echoed data will be skewed less than 1 bit time (see parameter IR141). When the MODE pin goes high, the device is returned to Data Mode where the encoder/decoder is in operation. Table 2-2 shows the software hex commands to configure the MCP2120's baud rate. The MCP2120 receives data bytes at the existing baud rate. When the change baud rate command (0x11) is received, the last valid baud rate value received becomes the new baud rate. The new baud rate is effective after the stop bit of the echoed data. Figure 2-2 shows this sequence. When the controller receives serial data from the MCP2120, the baud rates are required to match. There will be some jitter on the detection of the high to low edge of the start bit. This jitter will affect the placement of the decoded Start bit. All subsequent bits will be 16 BITCLK times later. FIGURE 2-1: Data Mode Data/Command Mode Flow Data Mode Command Mode MODE pin goes high New baud rate MCP2120 echoes 0x11 Controller sends 0x11 MCP2120 echoes baud Controller sends baud MODE pin goes low When echoing the Data, once the first bit is detected, it is echoed back. This means that the echoed data is skewed no more than 1 bit time. The new baud rate can occur once the echoed stop bit completes. 2.4.2 TRANSMITTING When the controller sends serial data to the MCP2120, the baud rates are required to match. There will be some jitter on the detection of the high to low edge of the start bit. This jitter will affect the placement of the encoded start bit. All subsequent bits will be 16 BITCLK times later. TABLE 2-2: Hex Command(3, 4) SOFTWARE BAUD RATE SELECTION VS. FREQUENCY Frequency (MHz) 0.6144(1) 2.000 3.6864 4.9152 7.3728 14.7456(2) 20.000(2) Bit Rate 800 2604 4800 6400 9600 19200 26042 FOSC / 768 0x87 1600 5208 9600 12800 19200 38400 52083 FOSC / 384 0x8B 3200 10417 19200 25600 38400 78600 104167 FOSC / 192 0x85 0x83 4800 15625 28800 38400 57600 115200 156250 FOSC / 128 9600 31250 57600 78600 115200 230400 312500 FOSC / 64 0x81 Note 1: An external clock is recommended for frequencies below 2 MHz. 2: For frequencies above 7.3728 MHz, the TXIR pulse width (parameter IR121) will be shorter than the 1.6 s IrDA standard specification. 3: Command 0x11 is used to change to the new baud rate. 4: All other command codes are reserved for possible future use. DS21618B-page 6 (c) 2007 Microchip Technology Inc. MCP2120 2.5 Modulation 2.6 Demodulation When the UART receives data to be transmitted, the data needs to be modulated. This modulated signal drives the IR transceiver module. Figure 2-2 shows the encoding of the modulated signal. Each bit time is comprised of 16-bit clocks. If the value to be transmitted (as determined by the TX pin) is a logic low, then the TXIR pin will output a low level for 7-bit clock cycles, a logic high level for 3-bit clock cycles, and then the remaining 6-bit clock cycles will be low. If the value to transmit is a logic high, then the TXIR pin will output a low level for the entire 16-bit clock cycles. The modulated signal from the IR transceiver module needs to be demodulated to form the received data. As demodulation occurs, the bit value is placed on the RX pin in UART format. Figure 2-3 shows the decoding of the modulated signal. Each bit time is comprised of 16 bit clocks. If the value to be received is a logic low, then the RXIR pin will be a low level for the first 3-bit clock cycles, and then the remaining 13-bit clock cycles will be high. If the value to be received is a logic high, then the RXIR pin will be a high level for the entire 16-bit clock cycles. The level on the RX pin will be in the appropriate state for the entire 16 clock cycles. FIGURE 2-2: Encoding Start Bit 16 CLK Data bit 0 Data bit 1 Data bit 2 Data bit... BITCLK TX 7 CLK TXIR 12 Tosc 0 1 0 0 1 0 FIGURE 2-3: Decoding Start Bit 16 CLK Data bit 0 Data bit 1 Data bit 2 Data bit ... BITCLK (CLK) RXIR 1.6 s 8 CLK 16 CLK RX 0 13 CLK (or 50.5 s typical) 16 CLK 16 CLK 16 CLK 16 CLK 16 CLK 1 0 0 1 0 (c) 2007 Microchip Technology Inc. DS21618B-page 7 MCP2120 2.7 Encoding/Decoding Jitter and Offset 2.8 Minimizing Power The device can be placed in a low power mode by disabling the device (holding the EN pin at the low state). The internal state machine is monitoring this pin for a low level, and once this is detected the device is disabled and enters into a low power state. Figure 2-4 shows the jitter and offset that is possible on the RX pin and the TXIR pin. Jitter is the possible variation of the desired edge. Offset is the propagation delay of the input signal (RXIR or TX) to the output signal (RX or TXIR). The first bit on the output pin (on RX or TXIR) will show jitter compared to the input pin (RXIR or TX), but all remaining bits will be a constant distance. 2.8.1 RETURNING TO OPERATION When the device is disabled, the device is in a low power state. When the EN pin is brought to a high level, the device will return to the operating mode. The device requires a delay of 1000 TOSC before data may be transmitted or received. FIGURE 2-4: Effects of Jitter and Offset 16 CLK 16 CLK BITCLK 3 CLK RXIR RX RX Jitter TX 16 CLK TXIR 3 CLK TX Jitter TX Offset RX Offset 16 CLK DS21618B-page 8 (c) 2007 Microchip Technology Inc. MCP2120 3.0 DEVELOPMENT TOOLS The MCP212X Developer's Daughter Board is used to evaluate and demonstrate the MCP2122 or the MCP2120 IrDA(R) Standard Encoder/Decoder devices. A header allows the MCP212X Developer's Daughter Board to be jumpered easily into systems for development purposes. The MCP212X Developer's Daughter Board is designed to interface to several of the "new" low cost PIC(R) Demo Boards. These include the PICDEM HPC Explorer Demo board, the PICDEM FS USB Demo board, and the PICDEM LCD Demo board. When the MCP212X Developer's Daughter Board is used in conjunction with the PICDEM HPC Explorer Demo board, the MCP212x can be connected to either of the PIC18F8772's two UARTs or the RX and TX signals can be "crossed" so the MCP212x device can communicate directly out the PICDEM HPC Explorer Demo Board's UART (DB-9). The MCP2120/MCP2150 Developer's Kit has been obsoleted but if you have access to one of these kits, it can be used to demonstrate the operation of the MCP2120. Features: * 8-pin socket for installation of MCP2122 (installed) and 14-pin socket for installation of MCP2120 * Three Optical Transceiver circuits (1 installed) * Headers to interface to low cost PICDEM Demo Boards, including: - * PICDEMTM HPC Explorer Demo Board - * PICDEMTM LCD Demo Board - * PICDEMTM FS USB Demo Board - * PICDEMTM 2 Plus Demo Board * Headers to easily connect to the user's embedded system * Jumpers to select routing of MCP212X signals to the PICDEMTM Demo Board Headers * Jumpers to configure the operating mode of the board (c) 2007 Microchip Technology Inc. DS21618B-page 9 MCP2120 NOTES: DS21618B-page 10 (c) 2007 Microchip Technology Inc. MCP2120 4.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Ambient Temperature under bias ........................................................................................................... -40C to +125C Storage Temperature ............................................................................................................................. -65C to +150C Voltage on VDD with respect to VSS .....................................................................................................................0 to +7V Voltage on RESET with respect to VSS .............................................................................................................0 to +14V Voltage on all other pins with respect to VSS ................................................................................. -0.6V to (VDD + 0.6V) Total Power Dissipation (1) ...................................................................................................................................700 mW Max. Current out of VSS pin ..................................................................................................................................150 mA Max. Current into VDD pin .....................................................................................................................................125 mA Input Clamp Current, IIK (VI < 0 or VI > VDD) ................................................................................................................... 20 mA Output Clamp Current, IOK (V0 < 0 or V0 > VDD)............................................................................................................. 20 mA Max. Output Current sunk by any Output pin..........................................................................................................25 mA Max. Output Current sourced by any Output pin.....................................................................................................25 mA Note 1: Power Dissipation is calculated as follows: PDIS = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL) Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. NOTICE: (c) 2007 Microchip Technology Inc. DS21618B-page 11 MCP2120 FIGURE 4-1: 6.0 5.5 5.0 VDD (Volts) 4.5 4.0 3.5 3.0 2.5 2.0 0 4 8 10 12 16 20 Voltage-Frequency Graph, -40C TA +85C Frequency (MHz) FMAX = (8.0 MHz/V) (VDDAPPMIN -2.5V) + 4 MHz Note: VDDAPPMIN is the minimum voltage of the MCP2120 in the application. DS21618B-page 12 (c) 2007 Microchip Technology Inc. MCP2120 4.1 DC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Characteristic Supply Voltage RAM Data Retention Voltage (2) VDD Start Voltage to ensure Power-on Reset VDD Rise Rate to ensure Power-on Reset Supply Current (3) Min 2.5 2.5 -- Typ(1) -- -- VSS Max 5.5 -- -- Units V V V Conditions See Figure 4-1 Device Oscillator/Clock stopped DC Characteristics Param. No. D001 D002 D003 Sym VDD VDR VPOR D004 SVDD 0.05 -- -- V/ms D010 IDD -- -- -- -- -- -- -- -- -- -- 0.8 0.6 0.4 3 4 4.5 0.25 0.25 0.4 3 1.4 1.0 0.8 7 12 16 4 3 5.5 8 mA mA mA mA mA mA A A A A FOSC = 4 MHz, VDD = 5.5V FOSC = 4 MHz, VDD = 3.0V FOSC = 4 MHz, VDD = 2.5V FOSC = 10 MHz, VDD = 3.0V FOSC = 20 MHz, VDD = 4.5V FOSC = 20 MHz, VDD = 5.5V VDD = 3.0V, 0C TA +70C VDD = 2.5V, 0C TA +70C VDD = 4.5V, 0C TA +70C VDD = 5.5V, -40C TA +85C D020 IPD Device Disabled Current (3, 4) Note 1: 2: 3: 4: Data in the Typical ("Typ") column is based on characterization results at +25C. This data is for design guidance only and is not tested. This is the limit to which VDD can be lowered without losing RAM data. The supply current is mainly a function of the operating voltage and frequency. Pin loading, pin rate, and temperature have an impact on the current consumption. a) The test conditions for all IDD measurements are made when device is enabled (EN pin is high): OSC1 = external square wave, from rail-to-rail; all input pins pulled to VSS, RXIR = VDD, RESET = VDD; b) When device is disabled (EN pin is low), the conditions for current measurements are the same. When the device is disabled (EN pin is low), current is measured with all input pins tied to VDD or VSS and the output pins driving a high or low level into infinite impedance. (c) 2007 Microchip Technology Inc. DS21618B-page 13 MCP2120 DC Characteristics (Continued) Standard Operating Conditions (unless otherwise specified) Operating temperature -40C TA +85C (industrial) Operating voltage VDD range as described in DC spec Section 4.1 "DC Characteristics". Min Typ Max Units Conditions DC CHARACTERISTICS Param No. Sym Characteristic Input Low Voltage VIL D030 D030A D031 D032 D033 VIH D040 D040A D041 D042 D043 Input pins with TTL buffer with Schmitt Trigger buffer RESET, RXIR OSC1 Input High Voltage Input pins with TTL buffer 2.0 0.25VDD + 0.8VDD with Schmitt Trigger buffer RESET, RXIR OSC1 Input Leakage Current (1, 2) 0.8VDD 0.8VDD 0.7VDD -- -- -- -- -- -- VDD VDD VDD VDD VDD V V otherwise V V V For entire VDD range 4.5 VDD 5.5V Vss Vss VSS VSS VSS -- -- -- -- -- 0.8V 0.15VDD 0.2VDD 0.2VDD 0.3VDD V V V V V For all 4.5 VDD 5.5V otherwise D060 D061 D063 D070 Note 1: IIL Input pins RESET OSC1 -- -- -- 50 -- -- -- 250 1 30 5 400 A A A A VSS VPIN VDD, Pin at hi-impedance VSS VPIN VDD VSS VPIN VDD, XT, HS and LP osc configuration VDD = 5V, VPIN = VSS Ipur weak pull-up current 2: The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. Negative current is defined as coming out of the pin. DS21618B-page 14 (c) 2007 Microchip Technology Inc. MCP2120 DC Characteristics (Continued) DC CHARACTERISTICS Param No. D080 D083 Standard Operating Conditions (unless otherwise specified) Operating temperature -40C TA +85C (industrial) Operating voltage VDD range as described in DC spec Section 4.1 "DC Characteristics" Characteristic Output Low Voltage TXIR, RX OSC2 Output High Voltage TXIR, RX (1) OSC2 Capacitive Loading Specs on Output Pins COSC2 OSC2 pin Min -- -- Typ -- -- Max 0.6 0.6 Units V V Conditions IOL = 8.5 mA, VDD = 4.5V, -40C to +85C IOL = 1.6 mA, VDD = 4.5V, -40C to +85C IOH = -3.0 mA, VDD = 4.5V, -40C to +85C IOH = -1.3 mA, VDD = 4.5V, -40C to +85C Sym VOL D090 D092 VOH VDD - 0.7 VDD - 0.7 -- -- -- -- V V D100 D101 Note 1: -- -- 15 50 pF pF when external clock is used to drive OSC1. CIO All Input or Output pins -- -- Negative current is defined as coming out of the pin. (c) 2007 Microchip Technology Inc. DS21618B-page 15 MCP2120 4.2 4.2.1 Timing Parameter Symbology and Load Conditions TIMING CONDITIONS The timing parameter symbols have been created following one of the following formats: The temperature and voltages specified in Table 4-2 apply to all timing specifications unless otherwise noted. Figure 42 specifies the load conditions for the timing specifications. TABLE 4-1: SYMBOLOGY 2. TppS T Time 1. TppS2ppS T F Frequency E Error Lowercase letters (pp) and their meanings: pp io Input or Output pin rx Receive bitclk RX/TX BITCLK drt Device Reset Timer Uppercase letters and their meanings: S F Fall H High I Invalid (Hi-impedance) L Low osc Oscillator tx Transmit RST Reset P R V Z Period Rise Valid Hi-impedance TABLE 4-2: AC TEMPERATURE AND VOLTAGE SPECIFICATIONS Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C (industrial) Operating voltage VDD range as described in DC spec Section 4.1 "DC Characteristics". AC CHARACTERISTICS FIGURE 4-2: Load Conditions for Device Timing Specifications PIN VSS CL CL = 50 pF for all pins except OSC2 15 pF for OSC2 when external clock is used to drive OSC1 DS21618B-page 16 (c) 2007 Microchip Technology Inc. MCP2120 4.3 Timing Diagrams and Specifications External Clock Timing Q4 OSC1 1 3 3 4 4 Q1 Q2 Q3 Q4 Q1 FIGURE 4-3: TABLE 4-3: EXTERNAL CLOCK TIMING REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Min Typ(1) Max Units Conditions AC Characteristics Param. No. 1 1A Sym TOSC 1C 3 4 Note 1: 2: 3: External CLKIN Period (2,3) 50 -- -- ns (2) Oscillator Period 50 -- 500 ns DC -- 20 MHz FOSC External CLKIN Frequency (2,3) 2 -- 20 MHz Oscillator Frequency (2) -- -- 0.01 % ECLK Clock Error TosL, Clock in (OSC1) 10 -- -- ns TosH Low or High Time TosR, Clock in (OSC1) -- -- 15 ns TosF Rise or Fall Time Data in the Typical ("Typ") column is at 5V, +25C unless otherwise stated. These parameters are for design guidance only and are not tested. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. When an external clock input is used, the "max" cycle time limit is "DC" (no clock) for all devices. A duty cycle of no more than 60/40 (High Time / Low Time or Low Time / High Time) is recommended for external clock inputs. (c) 2007 Microchip Technology Inc. DS21618B-page 17 MCP2120 FIGURE 4-4: I/O Waveform Q4 OSC1 Q1 Q2 Q3 Input Pin 17 Output Pin Old Value 20, 21 Note: Refer to Figure 4-2 for load conditions. 19 18 New Value TABLE 4-4: I/O TIMING REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Min Typ(1) Max Units Conditions AC Characteristics Param. No. 17 18 19 20 21 Note Sym TosH2ioV OSC1 (Q1 cycle) to Output -- -- 100 ns valid (2) TosH2ioI OSC1 (Q2 cycle) to Input 200 -- -- ns invalid (I/O in hold time) TioV2osH Input valid to OSC1 0 -- -- ns (I/O in setup time) -- 10 25 ns ToR RX and TXIR pin rise time (2) ToF RX and TXIR pin fall time (2) -- 10 25 ns 1: Data in the Typical ("Typ") column is at 5V, +25C unless otherwise stated. 2: See Figure 4-2 for loading conditions. DS21618B-page 18 (c) 2007 Microchip Technology Inc. MCP2120 FIGURE 4-5: VDD RESET 32 DRT Time-out Internal RESET Low Power Timer Reset 34 Output pin 30 32 32 Reset and Device Reset Timer Timing 31 34 TABLE 4-5: RESET AND DEVICE RESET TIMER REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic RESET Pulse Width (low) Low Power Time-out Period Device Reset Timer Period Output Hi-impedance from RESET Low or device Reset Min 2000 9 9 -- Typ(1) -- 18 18 -- Max -- 30 30 2 Units ns ms ms s Conditions VDD = 5.0 V VDD = 5.0 V VDD = 5.0 V AC Characteristics Param. No. 30 31 32 34 Sym TRSTL TLPT TDRT TioZ Note 1: Data in the Typical ("Typ") column is at 5V, 25C unless otherwise stated. (c) 2007 Microchip Technology Inc. DS21618B-page 19 MCP2120 FIGURE 4-6: USART ASynchronous Transmission Waveform Start Bit IR100 Data Bit IR100 Data Bit IR100 Data Bit IR100 TX pin IR103 Note: Refer to Figure 4-2 for load conditions. IR103 TABLE 4-6: USART ASYNCHRONOUS TRANSMISSION REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Min Typ Max Units Conditions Hardware Selection BAUD2:BAUD0 = 000 BAUD2:BAUD0 = 001 BAUD2:BAUD0 = 010 BAUD2:BAUD0 = 011 BAUD2:BAUD0 = 100 Software Selection BAUD2:BAUD0 = 111 Hex Command = 0x87 Hex Command = 0x8B Hex Command = 0x85 Hex Command = 0x83 Hex Command = 0x81 AC Characteristics Param. No. IR100 Sym TTXBIT Transmit Baud rate 768 384 192 128 64 -- -- -- -- -- 768 384 192 128 64 TOSC TOSC TOSC TOSC TOSC ETXBIT Transmit (TX pin) Baud rate Error (into MCP2120) -- IR102 ETXIRBIT Transmit (TXIR pin) Baud rate Error (out of MCP2120)(1) -- IR103 TTXRF TX pin rise time and fall time Note 1: This error is not additive to IR101 parameter. IR101 768 384 192 128 64 -- -- -- -- -- -- -- -- -- 768 384 192 128 64 1 1 25 TOSC TOSC TOSC TOSC TOSC % % ns DS21618B-page 20 (c) 2007 Microchip Technology Inc. MCP2120 FIGURE 4-7: USART ASynchronous Receive Timing Start Bit IR110 Data Bit IR110 Data Bit IR110 Data Bit IR110 RX pin IR112 Note: Refer to Figure 4-2 for load conditions. IR112 TABLE 4-7: USART ASYNCHRONOUS RECEIVE REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Min Typ Max Units Conditions Hardware Selection BAUD2:BAUD0 = 000 BAUD2:BAUD0 = 001 BAUD2:BAUD0 = 010 BAUD2:BAUD0 = 011 BAUD2:BAUD0 = 100 Software Selection BAUD2:BAUD0 = 111 Hex Command = 0x87 Hex Command = 0x8B Hex Command = 0x85 Hex Command = 0x83 Hex Command = 0x81 AC Characteristics Param. No. IR110 Sym TRXBIT Receive Baud Rate 768 384 192 128 64 -- -- -- -- -- 768 384 192 128 64 TOSC TOSC TOSC TOSC TOSC Receive (RXIR pin) Baud rate Error (into MCP2120) -- IR112 ERXBIT Receive (RX pin) Baud rate Error (out of MCP2120)(1) -- IR113 TTXRF RX pin rise time and fall time Note 1: This error is not additive to IR111 parameter. IR111 ERXBIT 768 384 192 128 64 -- -- -- -- -- -- -- -- -- 768 384 192 128 64 1 1 25 TOSC TOSC TOSC TOSC TOSC % % ns (c) 2007 Microchip Technology Inc. DS21618B-page 21 MCP2120 FIGURE 4-8: TX and TXIR Waveforms Start Bit IR100 BITCLK TX IR122 IR120 TXIR IR121 0 1 0 0 1 0 IR122 IR122 IR122 IR122 IR122 Data bit 7 Data bit 6 Data bit 5 Data bit ... TABLE 4-8: TX AND TXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Transmit Baud Rate 768 384 192 128 64 -- -- -- -- -- 768 384 192 128 64 8 TOSC TOSC TOSC TOSC TOSC Min Typ Max Units Conditions Hardware Selection BAUD2:BAUD0 = 000 BAUD2:BAUD0 = 001 BAUD2:BAUD0 = 010 BAUD2:BAUD0 = 011 BAUD2:BAUD0 = 100 Software Selection BAUD2:BAUD0 = 111 Hex Command = 0x87 Hex Command = 0x8B Hex Command = 0x85 Hex Command = 0x83 Hex Command = 0x81 AC Characteristics Param. No. Sym IR100 TTXBIT IR120 TTXL2TXIRH TX falling edge () to TXIR rising edge () (1) IR121 TTXIRPW TXIR pulse width IR122 TTXIRP TXIR bit period (1) Note 1: TBITCLK = TTXBIT/16 768 384 192 128 64 7TBITCLK - 8.34 s 12 -- -- -- -- -- -- 7 -- 16 768 TOSC 384 TOSC 192 TOSC 128 TOSC 64 TOSC 7TBITCLK TBITCLK + 8.34 s 12 TOSC -- TBITCLK DS21618B-page 22 (c) 2007 Microchip Technology Inc. MCP2120 FIGURE 4-9: RXIR and RX Waveforms Start Bit IR110 BITCLK RXIR IR131A IR130 IR131B RX 0 Start Bit 1 Data bit 7 0 Data bit 6 0 Data bit 5 1 Data bit ... 0 IR131B IR131B IR131B IR131B IR131B Data bit 7 Data bit 6 Data bit 5 Data bit ... TABLE 4-9: RXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Receive Baud Rate 768 384 192 128 64 -- -- -- -- -- 768 384 192 128 64 TOSC TOSC TOSC TOSC TOSC Min Typ Max Units Conditions Hardware Selection BAUD2:BAUD0 = 000 BAUD2:BAUD0 = 001 BAUD2:BAUD0 = 010 BAUD2:BAUD0 = 011 BAUD2:BAUD0 = 100 Software Selection BAUD2:BAUD0 = 111 Hex Command = 0x87 Hex Command = 0x8B Hex Command = 0x85 Hex Command = 0x83 Hex Command = 0x81 AC Characteristics Param. No. IR110 Sym TRXBIT IR130 TRXIRL2RXH RXIR falling edge () to RX falling edge () (1) IR131A TRXIRPW RXIR pulse width IR132 TRXIRP RXIR bit period (1) Note 1: TBITCLK = TRXBIT/16 768 384 192 128 64 8TBITCLK - 8.34 s 3 -- -- -- -- -- -- 8 -- 16 768 TOSC 384 TOSC 192 TOSC 128 TOSC 64 TOSC 8TBITCLK TBITCLK + 8.34 s 3 TOSC -- TBITCLK (c) 2007 Microchip Technology Inc. DS21618B-page 23 MCP2120 FIGURE 4-10: Command Mode: TX and RX Waveforms Start Bit BITCLK IR140A TX IR140B RX IR141 IR141 IR141 IR141 IR141 IR141 IR142 IR141 IR140B IR140B IR140B IR140B IR140B IR140A IR140A IR140A IR140A IR140A Data bit 7 Data bit 6 Data bit ... Stop bit Start Bit Data bit 7 (new Baud rate) TABLE 4-10: TX AND TXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C TA +85C (industrial) Operating Voltage VDD range is described in Section 4.1 "DC Characteristics" Characteristic Transmit Baud Rate Receive Baud Rate TX edge to RX edge (delay) Delay from RX Stop bit complete to TX Start bit (new baud rate) Min 16 16 5.5 -- Typ -- -- 8 -- Max 16 16 10.5 0 Units TBITCLK TBITCLK TBITCLK TOSC Conditions AC Characteristics Param. No. IR140A IR140B IR141 IR142 Sym BTX BRX TTXE2RXE TRXP2TXS DS21618B-page 24 (c) 2007 Microchip Technology Inc. MCP2120 5.0 DC AND AC CHARACTERISTICS GRAPHS AND TABLES The graphs and tables provided in this section are for design guidance and are not tested. In some graphs or tables the data presented is outside specified operating range (e.g., outside specified VDD range). This is for information only and devices will operate properly only within the specified range. The data presented in this section is a statistical summary of data collected on units from different lots over a period of time. "Typical" represents the mean of the distribution while "max" or "min" represents (mean + 3s) and (mean - 3s) respectively, where s is standard deviation. FIGURE 5-1: 950 850 750 650 DRT period (s) 550 450 350 250 Short DRT Period Vs. VDD Max +85C Typ +25C MIn -40C 150 0 0 2.5 3.5 4.5 5.5 6.5 VDD (Volts) (c) 2007 Microchip Technology Inc. DS21618B-page 25 MCP2120 FIGURE 5-2: 0 IOH vs. VOH, VDD = 2.5V FIGURE 5-4: 25 IOL vs. VOL, VDD = 2.5V -1 20 -2 Max -40C 15 IOL (mA) Typ +25C 10 -5 85C Min + 5C Typ +2 IOH (mA) -3 -4 Min +85C -6 5 40C Max - -7 500m 1.0 1.5 VOH (Volts) 2.0 2.5 0 0 250.0m 500.0m 1.0 VOL (Volts) FIGURE 5-3: 0 IOH vs. VOH, VDD = 5.5V FIGURE 5-1: 50 IOL vs. VOL, VDD = 5.5V -5 40 -10 IOH (mA) 30 IOL (mA) -15 Max -40C Typ +25C -25 M in Ty +8 M ax p 5 +2 C -4 5 0 C C -20 20 Min +85C 10 -30 3.5 4.0 4.5 VOH (Volts) 5.0 5.5 0 250.0m 500.0m 750.0m 1.0 VOL (Volts) DS21618B-page 26 (c) 2007 Microchip Technology Inc. MCP2120 6.0 6.1 PACKAGING INFORMATION Package Marking Information 14-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP2120 e3 PSAZNNN YYWW 14-Lead SOIC (150 mil) XXXXXXX XXXXXXX YYWWNNN Example: MCP2120 e3 /SL YYWWNNN Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2007 Microchip Technology Inc. DS21618B-page 27 MCP2120 14-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 2 3 D E A A2 L c A1 b b1 e Units Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing N e A A2 A1 E E1 D L c b1 b eB - .115 .015 .290 .240 .735 .115 .008 .045 .014 - MIN INCHES NOM 14 .100 BSC - .130 - .310 .250 .750 .130 .010 .060 .018 - .210 .195 - .325 .280 .775 .150 .015 .070 .022 MAX eB .430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-005B DS21618B-page 28 (c) 2007 Microchip Technology Inc. MCP2120 14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 b 3 e h h A2 c A A1 L L1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.17 0.31 5 5 0.25 0.40 - 1.25 0.10 MIN MILLMETERS NOM 14 1.27 BSC - - - 6.00 BSC 3.90 BSC 8.65 BSC - - 1.04 REF - - - - - 8 0.25 0.51 15 0.50 1.27 1.75 - 0.25 MAX 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-065B (c) 2007 Microchip Technology Inc. DS21618B-page 29 MCP2120 FIGURE 6-1: EMBOSSED CARRIER DIMENSIONS (16 MM TAPE) Top Cover Tape A0 W K0 B0 P TABLE 6-1: Case Outline SL CARRIER TAPE/CAVITY DIMENSIONS Package Type SOIC .150" 14L Carrier Dimensions W mm 16 P mm 8 A0 mm 6.5 Cavity Dimensions B0 mm 9.5 K0 mm 2.1 Output Quantity Units 2600 Reel Diameter in mm 330 FIGURE 6-2: SOIC DEVICE User Direction of Feed Pin 1 Pin 1 W, Width of Carrier Tape P, Pitch Standard Reel Component Orientation Reverse Reel Component Orientation DS21618B-page 30 (c) 2007 Microchip Technology Inc. MCP2120 APPENDIX A: REVISION HISTORY Revision B (February 2007) * Updated Development Tools section * Update packaging outline drawings * Updates Product Identification System section. Revision A (March 2001) * Initial release of this document (c) 2007 Microchip Technology Inc. DS21618B-page 31 NOTES: DS21618B-page 32 (c) 2007 Microchip Technology Inc. MCP2120 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples: a) b) c) Device MCP2120: Infrared Encoder/Decoder MCP2120T: Infrared Encoder/Decoder, Tape and Reel I P SL = -40xC to+85xC = Plastic DIP (300 mil, Body), 14-lead = Plastic SOIC (150 mil, Body), 14-lead Industrial Temperature, PDIP packaging MCP2120-I/SL: Industrial Temperature, SOIC package MCP2120T-I/SL: Tape and Reel, Industrial Temperature, SOIC package MCP2120-I/P: Temperature Range Package (c) 2007 Microchip Technology Inc. DS21618B-page 33 MCP2120 NOTES: DS21618B-page 34 (c) 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2007 Microchip Technology Inc. DS21618B-page 35 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256 ASIA/PACIFIC India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 12/08/06 DS21618B-page 36 (c) 2007 Microchip Technology Inc. |
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